BibTeX record journals/jssc/NarendraDBAC04

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@article{DBLP:journals/jssc/NarendraDBAC04,
  author       = {Siva G. Narendra and
                  Vivek De and
                  Shekhar Borkar and
                  Dimitri A. Antoniadis and
                  Anantha P. Chandrakasan},
  title        = {Full-chip subthreshold leakage power prediction and reduction techniques
                  for sub-0.18-{\(\mu\)}m {CMOS}},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {39},
  number       = {3},
  pages        = {501--510},
  year         = {2004},
  url          = {https://doi.org/10.1109/JSSC.2003.821776},
  doi          = {10.1109/JSSC.2003.821776},
  timestamp    = {Thu, 05 May 2022 15:14:01 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/NarendraDBAC04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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