BibTeX record journals/jssc/NamekawaMFHWBTS00

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@article{DBLP:journals/jssc/NamekawaMFHWBTS00,
  author       = {Toshimasa Namekawa and
                  Shinji Miyano and
                  Ryo Fukuda and
                  Ryo Haga and
                  Osamu Wada and
                  Hironori Banba and
                  Satoru Takeda and
                  Kazuhiro Suda and
                  Kenichiro Mimoto and
                  Satoshi Yamaguchi and
                  Tsutomu Ohkubo and
                  Hiroshi Takato and
                  Kenji Numata},
  title        = {Dynamically shift-switched dataline redundancy suitable for {DRAM}
                  macro with wide data bus},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {35},
  number       = {5},
  pages        = {705--712},
  year         = {2000},
  url          = {https://doi.org/10.1109/4.841497},
  doi          = {10.1109/4.841497},
  timestamp    = {Fri, 08 Apr 2022 11:01:40 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/NamekawaMFHWBTS00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}