BibTeX record journals/jssc/LinWLGPLC17

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@article{DBLP:journals/jssc/LinWLGPLC17,
  author       = {Zhiting Lin and
                  Xiulong Wu and
                  Zhi Li and
                  Lijun Guan and
                  Chunyu Peng and
                  Changyong Liu and
                  Junning Chen},
  title        = {A Pipeline Replica Bitline Technique for Suppressing Timing Variation
                  of {SRAM} Sense Amplifiers in a 28-nm {CMOS} Process},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {52},
  number       = {3},
  pages        = {669--677},
  year         = {2017},
  url          = {https://doi.org/10.1109/JSSC.2016.2634701},
  doi          = {10.1109/JSSC.2016.2634701},
  timestamp    = {Sun, 30 Aug 2020 00:12:37 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/LinWLGPLC17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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