BibTeX record journals/jssc/KimuraNAMYFOY95

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@article{DBLP:journals/jssc/KimuraNAMYFOY95,
  author       = {Tohru Kimura and
                  Kazuyuki Nakamura and
                  Yoshiharu Aimoto and
                  Takashi Manabe and
                  Nobuyuki Yamashita and
                  Yoshihiro Fujita and
                  Shin'ichiro Okazaki and
                  Masakazu Yamashina},
  title        = {Design of 1.28-GB/s high bandwidth 2-Mb {SRAM} for integrated memory
                  array processor applications},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {30},
  number       = {6},
  pages        = {637--643},
  year         = {1995},
  url          = {https://doi.org/10.1109/4.387066},
  doi          = {10.1109/4.387066},
  timestamp    = {Wed, 03 May 2023 22:43:50 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/KimuraNAMYFOY95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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