BibTeX record journals/jssc/JoNY11

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@article{DBLP:journals/jssc/JoNY11,
  author       = {Jun{-}Gi Jo and
                  Jinho Noh and
                  Changsik Yoo},
  title        = {A 20-MHz Bandwidth Continuous-Time Sigma-Delta Modulator With Jitter
                  Immunity Improved Full Clock Period {SCR} {(FSCR)} {DAC} and High-Speed
                  {DWA}},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {46},
  number       = {11},
  pages        = {2469--2477},
  year         = {2011},
  url          = {https://doi.org/10.1109/JSSC.2011.2164296},
  doi          = {10.1109/JSSC.2011.2164296},
  timestamp    = {Sun, 30 Aug 2020 00:12:49 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/JoNY11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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