BibTeX record journals/jssc/Hernandez-Garduno08

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@article{DBLP:journals/jssc/Hernandez-Garduno08,
  author       = {David Hernandez{-}Garduno and
                  Jos{\'{e}} Silva{-}Mart{\'{\i}}nez},
  title        = {A {CMOS} 1 Gb/s 5-Tap Fractionally-Spaced Equalizer},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {43},
  number       = {11},
  pages        = {2482--2491},
  year         = {2008},
  url          = {https://doi.org/10.1109/JSSC.2008.2005536},
  doi          = {10.1109/JSSC.2008.2005536},
  timestamp    = {Sun, 30 Aug 2020 00:12:59 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/Hernandez-Garduno08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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