@article{DBLP:journals/jssc/ChunJKK12,
author = {Ki Chul Chun and
Pulkit Jain and
Tae-Ho Kim and
Chris H. Kim},
title = {A 667 MHz Logic-Compatible Embedded DRAM Featuring an Asymmetric
2T Gain Cell for High Speed On-Die Caches},
journal = {J. Solid-State Circuits},
volume = {47},
number = {2},
year = {2012},
pages = {547-559},
ee = {http://dx.doi.org/10.1109/JSSC.2011.2168729},
bibsource = {DBLP, http://dblp.uni-trier.de}
}