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BibTeX record journals/jssc/BaileyRHLCMWMIW19
@article{DBLP:journals/jssc/BaileyRHLCMWMIW19, author = {Steven Bailey and Paul Rigge and Jaeduk Han and Richard Lin and Eric Chang and Howard Mao and Zhongkai Wang and Chick Markley and Adam M. Izraelevitz and Angie Wang and Nathan Narevsky and Woo{-}Rham Bae and Steve Shauck and Sergio Montano and Justin Norsworthy and Munir Razzaque and Wen Hau Ma and Akalu Lentiro and Matthew Doerflein and Darin Heckendorn and Jim McGrath and Franco DeSeta and Ronen Shoham and Mike Stellfox and Mark Snowden and Joseph Cole and Dan Fuhrman and Brian C. Richards and Jonathan Bachrach and Elad Alon and Borivoje Nikolic}, title = {A Mixed-Signal {RISC-V} Signal Analysis SoC Generator With a 16-nm FinFET Instance}, journal = {{IEEE} J. Solid State Circuits}, volume = {54}, number = {10}, pages = {2786--2801}, year = {2019}, url = {https://doi.org/10.1109/JSSC.2019.2924090}, doi = {10.1109/JSSC.2019.2924090}, timestamp = {Sun, 30 Aug 2020 00:13:38 +0200}, biburl = {https://dblp.org/rec/journals/jssc/BaileyRHLCMWMIW19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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