<?xml version="1.0"?>
<dblp>
<article key="journals/jsa/BakalisKNVA02" mdate="2007-02-28">
<author>Dimitris Bakalis</author>
<author>Emmanouil Kalligeros</author>
<author>Dimitris Nikolos</author>
<author>Haridimos T. Vergos</author>
<author>George Alexiou</author>
<title>On the design of low power BIST for multipliers with Booth encoding and Wallace tree summation.</title>
<pages>125-135</pages>
<year>2002</year>
<volume>48</volume>
<journal>Journal of Systems Architecture</journal>
<number>4-5</number>
<ee>http://dx.doi.org/10.1016/S1383-7621(02)00121-2</ee>
<url>db/journals/jsa/jsa48.html#BakalisKNVA02</url>
</article>
</dblp>
