Tradeoffs in Design of Low-Power Gated-Oscillator Clock and Data Recovery Circuits.

Armin Tajalli Paul Muller Yusuf Leblebici Tradeoffs in Design of Low-Power Gated-Oscillator Clock and Data Recovery Circuits. 345-354 2007 3 J. Low Power Electronics 3 http://dx.doi.org/10.1166/jolpe.2007.145 db/journals/jolpe/jolpe3.html#TajalliML07