@article{DBLP:journals/jilp/ZhangZZ01,
author = {Zhao Zhang and
Zhichun Zhu and
Xiaodong Zhang},
title = {Breaking Address Mapping Symmetry at Multi-levels of Memory
Heirarchy to Reduce DRAM Row-buffer Conflicts},
journal = {J. Instruction-Level Parallelism},
volume = {3},
year = {2001},
ee = {http://www.jilp.org/vol3/zhang-jilp.pdf},
bibsource = {DBLP, http://dblp.uni-trier.de}
}