BibTeX record journals/jcsc/WeiS06

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@article{DBLP:journals/jcsc/WeiS06,
  author       = {Shugang Wei and
                  Kensuke Shimizu},
  title        = {Modulo (2\({}^{\mbox{p}}\) plusminus 1) Multipliers Using a Three-operand
                  Modular Signed-digit Addition Algorithm},
  journal      = {J. Circuits Syst. Comput.},
  volume       = {15},
  number       = {1},
  pages        = {129--144},
  year         = {2006},
  url          = {https://doi.org/10.1142/S0218126606002976},
  doi          = {10.1142/S0218126606002976},
  timestamp    = {Tue, 25 Aug 2020 16:57:28 +0200},
  biburl       = {https://dblp.org/rec/journals/jcsc/WeiS06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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