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BibTeX record journals/jcsc/ParanePT19
@article{DBLP:journals/jcsc/ParanePT19, author = {Khyamling Parane and Prabhu B. M. Prasad and Basavaraj Talawar}, title = {YaNoC: Yet Another Network-on-Chip Simulation Acceleration Engine Supporting Congestion-Aware Adaptive Routing Using FPGAs}, journal = {J. Circuits Syst. Comput.}, volume = {28}, number = {12}, pages = {1950202:1--1950202:31}, year = {2019}, url = {https://doi.org/10.1142/S0218126619502025}, doi = {10.1142/S0218126619502025}, timestamp = {Tue, 25 Aug 2020 16:57:09 +0200}, biburl = {https://dblp.org/rec/journals/jcsc/ParanePT19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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