BibTeX record journals/jcsc/ArasuB16

download as .bib file

@article{DBLP:journals/jcsc/ArasuB16,
  author       = {S. P. Valan Arasu and
                  S. Baulkani},
  title        = {An Efficient {FPGA} Architecture with High-Performance 2D {DWT} Processor
                  for Medical Imaging},
  journal      = {J. Circuits Syst. Comput.},
  volume       = {25},
  number       = {9},
  pages        = {1650110:1--1650110:22},
  year         = {2016},
  url          = {https://doi.org/10.1142/S0218126616501103},
  doi          = {10.1142/S0218126616501103},
  timestamp    = {Tue, 25 Aug 2020 16:57:32 +0200},
  biburl       = {https://dblp.org/rec/journals/jcsc/ArasuB16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.