<?xml version="1.0"?>
<dblp>
<article key="journals/integration/ZhangS08" mdate="2008-06-25">
<author>Tianpei Zhang</author>
<author>Sachin S. Sapatnekar</author>
<title>Buffering global interconnects in structured ASIC design.</title>
<pages>171-182</pages>
<year>2008</year>
<volume>41</volume>
<journal>Integration</journal>
<number>2</number>
<ee>http://dx.doi.org/10.1016/j.vlsi.2007.04.002</ee>
<url>db/journals/integration/integration41.html#ZhangS08</url>
</article>
</dblp>
