Gate-level dual-threshold static power optimization methodology (GDSPOM) using path-based static timing analysis (STA) technique for SOC application.

B. Chung J. B. Kuo Gate-level dual-threshold static power optimization methodology (GDSPOM) using path-based static timing analysis (STA) technique for SOC application. 9-16 2008 41 Integration 1 http://dx.doi.org/10.1016/j.vlsi.2007.03.001 db/journals/integration/integration41.html#ChungK08