<?xml version="1.0"?>
<dblp>
<article key="journals/ieicet/TsengLS06" mdate="2008-01-24">
<author>Wenliang Tseng</author>
<author>Chien-Nan Jimmy Liu</author>
<author>Chauchin Su</author>
<title>Passive Reduced-Order Macro-Modeling for Linear Time-Delay Interconnect Systems.</title>
<pages>1713-1718</pages>
<year>2006</year>
<volume>89-C</volume>
<journal>IEICE Transactions</journal>
<number>11</number>
<ee>http://dx.doi.org/10.1093/ietele/e89-c.11.1713</ee>
<url>db/journals/ieicet/ieicet89c.html#TsengLS06</url>
</article>
</dblp>
