Low-Voltage, Low-Distortion and Rail-to-Rail CMOS Sample and Hold Circuit.

Koichi Tanno Kiminobu Sato Hisashi Tanaka Okihiko Ishizuka Low-Voltage, Low-Distortion and Rail-to-Rail CMOS Sample and Hold Circuit. 2696-2698 2005 88-A IEICE Transactions 10 http://dx.doi.org/10.1093/ietfec/e88-a.10.2696 db/journals/ieicet/ieicet88a.html#TannoSTI05