Asymmetric Slope Dual Mode Differential Logic Circuit for Compatibility of Low-Power and High-Speed Operations.

Masao Morimoto Makoto Nagata Kazuo Taki Asymmetric Slope Dual Mode Differential Logic Circuit for Compatibility of Low-Power and High-Speed Operations. 675-682 2007 90-C IEICE Transactions 4 http://dx.doi.org/10.1093/ietele/e90-c.4.675 db/journals/ieicet/ieicet90c.html#MorimotoNT07