<?xml version="1.0"?>
<dblp>
<article key="journals/ieicet/KurataNSOAKKKHISSITF07" mdate="2008-01-22">
<author>Hideaki Kurata</author>
<author>Satoshi Noda</author>
<author>Yoshitaka Sasago</author>
<author>Kazuo Otsuga</author>
<author>Tsuyoshi Arigane</author>
<author>Tetsufumi Kawamura</author>
<author>Takashi Kobayashi</author>
<author>Hitoshi Kume</author>
<author>Kazuki Homma</author>
<author>Teruhiko Ito</author>
<author>Yoshinori Sakamoto</author>
<author>Masahiro Shimizu</author>
<author>Yoshinori Ikeda</author>
<author>Osamu Tsuchiya</author>
<author>Kazunori Furusawa</author>
<title>A 126 mm<sup>2</sup> 4-Gb Multilevel AG-AND Flash Memory with Inversion-Layer-Bit-Line Technology.</title>
<pages>2146-2156</pages>
<year>2007</year>
<volume>90-C</volume>
<journal>IEICE Transactions</journal>
<number>11</number>
<ee>http://dx.doi.org/10.1093/ietele/e90-c.11.2146</ee>
<url>db/journals/ieicet/ieicet90c.html#KurataNSOAKKKHISSITF07</url>
</article>
</dblp>
