Low-Voltage and Low-Power Logic, Memory, and Analog Circuit Techniques for SoCs Using 90 nm Technology and Beyond.

Koichiro Ishibashi Tetsuya Fujimoto Takahiro Yamashita Hiroyuki Okada Yukio Arima Yasuyuki Hashimoto Kohji Sakata Isao Minematsu Yasuo Itoh Haruki Toda Motoi Ichihashi Yoshihide Komatsu Masato Hagiwara Toshiro Tsukada Low-Voltage and Low-Power Logic, Memory, and Analog Circuit Techniques for SoCs Using 90 nm Technology and Beyond. 250-262 2006 89-C IEICE Transactions 3 http://dx.doi.org/10.1093/ietele/e89-c.3.250 db/journals/ieicet/ieicet89c.html#IshibashiFYOAHSMITIKHT06