Juinn-Dar Huang Chia-I Chen Wan-Ling Hsu Yen-Ting Lin Jing-Yang Jou Performance-Driven Architectural Synthesis for Distributed Register-File Microarchitecture with Inter-Island Delay. 559-566 2012 95-A IEICE Transactions 2 http://search.ieice.org/bin/summary.php?id=e95-a_2_559 db/journals/ieicet/ieicet95a.html#HuangCHLJ12