BibTeX
@article{DBLP:journals/ieicet/HigamiSTKT08,
author = {Yoshinobu Higami and
Kewal K. Saluja and
Hiroshi Takahashi and
Shin-ya Kobayashi and
Yuzo Takamatsu},
title = {Fault Simulation and Test Generation for Transistor Shorts
Using Stuck-at Test Tools},
journal = {IEICE Transactions},
volume = {91-D},
number = {3},
year = {2008},
pages = {690-699},
ee = {http://dx.doi.org/10.1093/ietisy/e91-d.3.690},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Copyright © 2008-09-16 by Michael Ley (ley@uni-trier.de)