Processor subsystem interconnect architecture for a large symmetric multiprocessing system.

Pak-kin Mak Gary E. Strait Michael A. Blake Kevin W. Kark Vesselina K. Papazova A. E. (Rick) Seigler Gary A. Van Huben Liyong Wang George C. Wellwood Processor subsystem interconnect architecture for a large symmetric multiprocessing system. 323-338 2004 48 IBM Journal of Research and Development 3-4 http://dx.doi.org/10.1147/rd.483.0323 db/journals/ibmrd/ibmrd48.html#MakSBKPSVWW04