@article{DBLP:journals/fmsd/AdamsHJ03,
author = {William Adams and
Warren A. Hunt Jr. and
Damir Jamsek},
title = {Verisym: Verifying Circuits by Symbolic Simulation},
journal = {Formal Methods in System Design},
volume = {22},
number = {2},
year = {2003},
pages = {163-173},
ee = {http://dx.doi.org/10.1023/A:1022977607142},
bibsource = {DBLP, http://dblp.uni-trier.de}
}