<?xml version="1.0"?>
<dblp>
<article key="journals/et/WangKFICT05" mdate="2007-09-18">
<author>Baosheng Wang</author>
<author>Andy Kuo</author>
<author>Touraj Farahmand</author>
<author>Andr&#233; Ivanov</author>
<author>Yong B. Cho</author>
<author>Sassan Tabatabaei</author>
<title>A Realistic Timing Test Model and Its Applications in High-Speed Interconnect Devices.</title>
<pages>621-630</pages>
<year>2005</year>
<volume>21</volume>
<journal>J. Electronic Testing</journal>
<number>6</number>
<ee>http://dx.doi.org/10.1007/s10836-005-4819-4</ee>
<url>db/journals/et/et21.html#WangKFICT05</url>
</article>
</dblp>
