BibTeX record: journals/dt/TsaiBCS05

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@article{DBLP:journals/dt/TsaiBCS05,
  author    = {Jeng{-}Liang Tsai and
               Dong Hyun Baik and
               Charlie Chung{-}Ping Chen and
               Kewal K. Saluja},
  title     = {Yield-Driven, False-Path-Aware Clock Skew Scheduling},
  journal   = {{IEEE} Design {\&} Test of Computers},
  year      = {2005},
  volume    = {22},
  number    = {3},
  pages     = {214--222},
  url       = {http://doi.ieeecomputersociety.org/10.1109/MDT.2005.75},
  doi       = {10.1109/MDT.2005.75},
  timestamp = {Wed, 01 Oct 2014 14:20:23 +0200},
  biburl    = {http://dblp.uni-trier.de/rec/bib/journals/dt/TsaiBCS05},
  bibsource = {dblp computer science bibliography, http://dblp.org}
}