BibTeX record journals/corr/TsengLYJTLS17

download as .bib file

@article{DBLP:journals/corr/TsengLYJTLS17,
  author       = {Tsun{-}Ming Tseng and
                  Bing Li and
                  Ching{-}Feng Yeh and
                  Hsiang{-}Chieh Jhan and
                  Zuo{-}Min Tsai and
                  Mark Po{-}Hung Lin and
                  Ulf Schlichtmann},
  title        = {Novel {CMOS} {RFIC} Layout Generation with Concurrent Device Placement
                  and Fixed-Length Microstrip Routing},
  journal      = {CoRR},
  volume       = {abs/1705.04991},
  year         = {2017},
  url          = {http://arxiv.org/abs/1705.04991},
  eprinttype    = {arXiv},
  eprint       = {1705.04991},
  timestamp    = {Mon, 13 Aug 2018 16:49:06 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/TsengLYJTLS17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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