BibTeX record journals/corr/SahaBMS13

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@article{DBLP:journals/corr/SahaBMS13,
  author       = {Dipankar Saha and
                  Subhramita Basak and
                  Sagar Mukherjee and
                  Chandan Kumar Sarkar},
  title        = {A Low-Voltage, Low-Power 4-bit {BCD} Adder, designed using the Clock
                  Gated Power Gating, and the {DVT} Scheme},
  journal      = {CoRR},
  volume       = {abs/1309.7163},
  year         = {2013},
  url          = {http://arxiv.org/abs/1309.7163},
  eprinttype    = {arXiv},
  eprint       = {1309.7163},
  timestamp    = {Mon, 13 Aug 2018 16:49:16 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/SahaBMS13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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