Some Improved Designs for the Digital Summation Threshold Logic (DSTL) Gate.

C. R. Edwards Some Improved Designs for the Digital Summation Threshold Logic (DSTL) Gate. 73-78 1978 21 Comput. J. 1 db/journals/cj/cj21.html#Edwards78 http://dx.doi.org/10.1093/comjnl/21.1.73