BibTeX record journals/cal/ChenCWY17

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@article{DBLP:journals/cal/ChenCWY17,
  author       = {Li{-}Jhan Chen and
                  Hsiang{-}Yun Cheng and
                  Po{-}Han Wang and
                  Chia{-}Lin Yang},
  title        = {Improving {GPGPU} Performance via Cache Locality Aware Thread Block
                  Scheduling},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {2},
  pages        = {127--131},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2017.2693371},
  doi          = {10.1109/LCA.2017.2693371},
  timestamp    = {Tue, 04 May 2021 13:02:18 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/ChenCWY17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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