BibTeX record conf/wcet/LofwenmarkN16

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@inproceedings{DBLP:conf/wcet/LofwenmarkN16,
  author       = {Andreas L{\"{o}}fwenmark and
                  Simin Nadjm{-}Tehrani},
  editor       = {Martin Schoeberl},
  title        = {Understanding Shared Memory Bank Access Interference in Multi-Core
                  Avionics},
  booktitle    = {16th International Workshop on Worst-Case Execution Time Analysis,
                  {WCET} 2016, July 5, 2016, Toulouse, France},
  series       = {OASIcs},
  volume       = {55},
  pages        = {12:1--12:11},
  publisher    = {Schloss Dagstuhl - Leibniz-Zentrum f{\"{u}}r Informatik},
  year         = {2016},
  url          = {https://doi.org/10.4230/OASIcs.WCET.2016.12},
  doi          = {10.4230/OASICS.WCET.2016.12},
  timestamp    = {Wed, 21 Aug 2024 22:46:00 +0200},
  biburl       = {https://dblp.org/rec/conf/wcet/LofwenmarkN16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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