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BibTeX record conf/vts/YanHYCL17
@inproceedings{DBLP:conf/vts/YanHYCL17, author = {Aibin Yan and Zhengfeng Huang and Maoxiang Yi and Jie Cui and Huaguo Liang}, title = {{HLDTL:} High-performance, low-cost, and double node upset tolerant latch design}, booktitle = {35th {IEEE} {VLSI} Test Symposium, {VTS} 2017, Las Vegas, NV, USA, April 9-12, 2017}, pages = {1--6}, publisher = {{IEEE} Computer Society}, year = {2017}, url = {https://doi.org/10.1109/VTS.2017.7928930}, doi = {10.1109/VTS.2017.7928930}, timestamp = {Fri, 24 Mar 2023 00:04:05 +0100}, biburl = {https://dblp.org/rec/conf/vts/YanHYCL17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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