BibTeX
@inproceedings{DBLP:conf/vts/NatarajanPC06,
author = {Suriyaprakash Natarajan and
Srinivas Patil and
Sreejit Chakravarty},
title = {Path Delay Fault Simulation on Large Industrial Designs},
booktitle = {VTS},
year = {2006},
pages = {16-23},
ee = {http://doi.ieeecomputersociety.org/10.1109/VTS.2006.55},
crossref = {DBLP:conf/vts/2006},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
@proceedings{DBLP:conf/vts/2006,
title = {24th IEEE VLSI Test Symposium (VTS 2006), 30 April - 4 May
2006, Berkeley, California, USA},
booktitle = {VTS},
publisher = {IEEE Computer Society},
year = {2006},
isbn = {0-7695-2514-8},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Copyright © 2006-05-31 by Michael Ley (ley@uni-trier.de)