Implications of Voltage and Dimension Scaling on CMOS Testing: The Multidimensional Testing Paradigm.

Ovidio V. Maiuri Will R. Moore Implications of Voltage and Dimension Scaling on CMOS Testing: The Multidimensional Testing Paradigm. 22-27 1998 conf/vts/1998 VTS http://csdl2.computer.org/dl/proceedings/vts/1998/8436/00/84360022.pdf db/conf/vts/vts1998.html#MaiuriM98