BibTeX record conf/vts/KallaC97

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@inproceedings{DBLP:conf/vts/KallaC97,
  author       = {Priyank Kalla and
                  Maciej J. Ciesielski},
  title        = {Testability of Sequential Circuits with Multi-Cycle False Path},
  booktitle    = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
                  Monterey, California, {USA}},
  pages        = {322--328},
  publisher    = {{IEEE} Computer Society},
  year         = {1997},
  url          = {https://doi.org/10.1109/VTEST.1997.600295},
  doi          = {10.1109/VTEST.1997.600295},
  timestamp    = {Fri, 24 Mar 2023 00:04:04 +0100},
  biburl       = {https://dblp.org/rec/conf/vts/KallaC97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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