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BibTeX record conf/vts/IyengarCKK03
@inproceedings{DBLP:conf/vts/IyengarCKK03, author = {Vikram Iyengar and Krishnendu Chakrabarty and Mark D. Krasniewski and Gopind N. Kumar}, title = {Design and Optimization of Multi-level {TAM} Architectures for Hierarchical SOCs}, booktitle = {21st {IEEE} {VLSI} Test Symposium {(VTS} 2003), 27 April - 1 May 2003, Napa Valley, CA, {USA}}, pages = {299--312}, publisher = {{IEEE} Computer Society}, year = {2003}, url = {https://doi.org/10.1109/VTEST.2003.1197667}, doi = {10.1109/VTEST.2003.1197667}, timestamp = {Fri, 24 Mar 2023 00:04:04 +0100}, biburl = {https://dblp.org/rec/conf/vts/IyengarCKK03.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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