<?xml version="1.0"?>
<dblp>
<inproceedings key="conf/vts/ChakravartyCHJPPSSTW05" mdate="2006-01-24">
<author>Sreejit Chakravarty</author>
<author>Yi-Shing Chang</author>
<author>Hiep Hoang</author>
<author>Sridhar Jayaraman</author>
<author>Silvio Picano</author>
<author>Cheryl Prunty</author>
<author>Eric W. Savage</author>
<author>Rehan Sheikh</author>
<author>Eric N. Tran</author>
<author>Khen Wee</author>
<title>Experimental Evaluation of Bridge Patterns for a High Performance Microprocessor.</title>
<pages>337-342</pages>
<year>2005</year>
<crossref>conf/vts/2005</crossref>
<booktitle>VTS</booktitle>
<ee>http://doi.ieeecomputersociety.org/10.1109/VTS.2005.44</ee>
<url>db/conf/vts/vts2005.html#ChakravartyCHJPPSSTW05</url>
</inproceedings>
</dblp>
