Hierarchical Test Access Architecture for Embedded Cores in an Integrated Circuit.

Debashis Bhattacharya Hierarchical Test Access Architecture for Embedded Cores in an Integrated Circuit. 8-14 1998 conf/vts/1998 VTS http://csdl2.computer.org/dl/proceedings/vts/1998/8436/00/84360008.pdf db/conf/vts/vts1998.html#Bhattacharya98