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BibTeX record conf/vtc/HesselSBBH10
@inproceedings{DBLP:conf/vtc/HesselSBBH10, author = {Sebastian Hessel and David Szczesny and Felix Bruns and Attila Bilgic and Josef Hausner}, title = {Architectural Analysis of a Smart {DMA} Controller for Protocol Stack Acceleration in {LTE} Terminals}, booktitle = {Proceedings of the 72nd {IEEE} Vehicular Technology Conference, {VTC} Fall 2010, 6-9 September 2010, Ottawa, Canada}, pages = {1--5}, publisher = {{IEEE}}, year = {2010}, url = {https://doi.org/10.1109/VETECF.2010.5594536}, doi = {10.1109/VETECF.2010.5594536}, timestamp = {Sun, 21 May 2017 00:19:17 +0200}, biburl = {https://dblp.org/rec/conf/vtc/HesselSBBH10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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