BibTeX record conf/vlsit/TangCHBZCLZTWMY23

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@inproceedings{DBLP:conf/vlsit/TangCHBZCLZTWMY23,
  author       = {Wei Tang and
                  Sung{-}Gun Cho and
                  Tim Tri Hoang and
                  Jacob Botimer and
                  Wei Qiang Zhu and
                  Ching{-}Chi Chang and
                  Cheng{-}Hsun Lu and
                  Junkang Zhu and
                  Yaoyu Tao and
                  Tianyu Wei and
                  Naomi Kavi Motwani and
                  Mani Yalamanchi and
                  Ramya Yarlagadda and
                  Sirisha Kale and
                  Mark Flannigan and
                  Allen Chan and
                  Thungoc Tran and
                  Sergey Y. Shumarayev and
                  Zhengya Zhang},
  title        = {Arvon: {A} Heterogeneous SiP Integrating a 14nm {FPGA} and Two 22nm
                  1.8TFLOPS/W DSPs with 1.7Tbps/mm\({}^{\mbox{2}}\) {AIB} 2.0 Interface
                  to Provide Versatile Workload Acceleration},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185388},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185388},
  timestamp    = {Sun, 30 Jul 2023 09:47:56 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/TangCHBZCLZTWMY23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}