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BibTeX record conf/vlsit/RyuKLAPLCCK0LSR22
@inproceedings{DBLP:conf/vlsit/RyuKLAPLCCK0LSR22, author = {Yesin Ryu and Young{-}Cheon Kwon and Jae Hoon Lee and Sung{-}Gi Ahn and Jaewon Park and Kijun Lee and Yu Ho Choi and Han{-}Won Cho and Jae San Kim and Jungyu Lee and Haesuk Lee and Seung Ho Song and Je{-}Min Ryu and Yeong Ho Yun and Useung Shin and Dajung Cho and Jeong Hoan Park and Jae{-}Seung Jeong and Suk Han Lee and Kyounghwan Lim and Tae{-}Sung Kim and Kyungmin Kim and Yu Jin Cha and Ik Joo Lee and Tae Kyu Byun and Han Sik Yoo and Yeong Geol Song and Myung{-}Kyu Lee and Sunghye Cho and Sung{-}Rae Kim and Ji{-}Min Choi and Hyoungmin Kim and Soo Young Kim and Jaeyoun Youn and Myeong{-}O. Kim and Kyomin Sohn and SangJoon Hwang and JooYoung Lee}, title = {A 16 {GB} 1024 GB/s {HBM3} {DRAM} with On-Die Error Control Scheme for Enhanced {RAS} Features}, booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022}, pages = {130--131}, publisher = {{IEEE}}, year = {2022}, url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830391}, doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830391}, timestamp = {Thu, 18 Apr 2024 08:14:57 +0200}, biburl = {https://dblp.org/rec/conf/vlsit/RyuKLAPLCCK0LSR22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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