A Delay Test to Differentiate Resistive Interconnect Faults from Weak Transistor Defects.

Haihua Yan Adit D. Singh A Delay Test to Differentiate Resistive Interconnect Faults from Weak Transistor Defects. 47-52 2005 conf/vlsid/2005 VLSI Design http://csdl.computer.org/comp/proceedings/vlsid/2005/2264/00/22640047abs.htm db/conf/vlsid/vlsid2005.html#YanS05