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BibTeX record conf/vlsid/WadekarCMN16
@inproceedings{DBLP:conf/vlsid/WadekarCMN16, author = {Jayesh Wadekar and Biman Chattopadhyay and Ravi Mehta and Gopalkrishna Nayak}, title = {A 0.5-4GHz Programmable-Bandwidth Fractional-N {PLL} for Multi-protocol {SERDES} in 28nm {CMOS}}, booktitle = {29th International Conference on {VLSI} Design and 15th International Conference on Embedded Systems, {VLSID} 2016, Kolkata, India, January 4-8, 2016}, pages = {236--239}, publisher = {{IEEE} Computer Society}, year = {2016}, url = {https://doi.org/10.1109/VLSID.2016.90}, doi = {10.1109/VLSID.2016.90}, timestamp = {Fri, 24 Mar 2023 00:04:00 +0100}, biburl = {https://dblp.org/rec/conf/vlsid/WadekarCMN16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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