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DBLP Record 'conf/vlsid/SridharanC06'

BibTeX

@inproceedings{DBLP:conf/vlsid/SridharanC06,
  author    = {Jayashree Sridharan and
               Tom Chen},
  title     = {Gate Delay Modeling with Multiple Input Switching for Static
               (Statistical) Timing Analysis},
  booktitle = {VLSI Design},
  year      = {2006},
  pages     = {323-328},
  ee        = {http://doi.ieeecomputersociety.org/10.1109/VLSID.2006.92},
  crossref  = {DBLP:conf/vlsid/2006},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}
@proceedings{DBLP:conf/vlsid/2006,
  title     = {19th International Conference on VLSI Design (VLSI Design
               2006), 3-7 January 2006, Hyderabad, India},
  booktitle = {VLSI Design},
  publisher = {IEEE Computer Society},
  year      = {2006},
  isbn      = {0-7695-2502-4},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}

Copyright © 2006-02-03 by Michael Ley (ley@uni-trier.de)