Fault-Tolerant Computing Using a Hybrid Nano-CMOS Architecture.

Muzaffer O. Simsir Srihari Cadambi Franjo Ivancic Martin Rötteler Niraj K. Jha Fault-Tolerant Computing Using a Hybrid Nano-CMOS Architecture. 435-440 2008 VLSI Design http://doi.ieeecomputersociety.org/10.1109/VLSI.2008.71 conf/vlsid/2008 db/conf/vlsid/vlsid2008.html#SimsirCIRJ08