@inproceedings{DBLP:conf/vlsid/ShimTCY08,
author = {Kyuho Shim and
Kesava R. Talupuru and
Maciej J. Ciesielski and
Seiyang Yang},
title = {Simulation Acceleration with HW Re-Compilation Avoidance},
booktitle = {VLSI Design},
year = {2008},
pages = {487-491},
ee = {http://doi.ieeecomputersociety.org/10.1109/VLSI.2008.62},
crossref = {DBLP:conf/vlsid/2008},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
@proceedings{DBLP:conf/vlsid/2008,
title = {21st International Conference on VLSI Design (VLSI Design
2008), 4-8 January 2008, Hyderabad, India},
booktitle = {VLSI Design},
publisher = {IEEE Computer Society},
year = {2008},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
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