Jianzhong Shi Akash Randhar Dinesh Bhatia Macro Block Based FPGA Floorplanning. 21-26 1997 conf/vlsid/1997 VLSI Design http://doi.ieeecomputersociety.org/10.1109/ICVD.1997.567955 db/conf/vlsid/vlsid1997.html#ShiRB97