BibTeX record conf/vlsid/SahaS14

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@inproceedings{DBLP:conf/vlsid/SahaS14,
  author       = {Partha Pratim Saha and
                  Tuhina Samanta},
  title        = {Obstacle Avoiding Rectilinear Clock Tree Construction with Skew Minimization},
  booktitle    = {2014 27th International Conference on {VLSI} Design, {VLSID} 2014,
                  and 2014 13th International Conference on Embedded Systems, Mumbai,
                  India, January 5-9, 2014},
  pages        = {387--392},
  publisher    = {{IEEE} Computer Society},
  year         = {2014},
  url          = {https://doi.org/10.1109/VLSID.2014.73},
  doi          = {10.1109/VLSID.2014.73},
  timestamp    = {Fri, 24 Mar 2023 00:04:01 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsid/SahaS14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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