DBLP Record 'conf/vlsid/RaghavanAB99'

BibTeX

@inproceedings{DBLP:conf/vlsid/RaghavanAB99,
  author    = {Nithya Raghavan and
               Venkatesh Akella and
               Smita Bakshi},
  title     = {Automatic Insertion of Gated Clocks at Register Transfer
               Level},
  booktitle = {VLSI Design},
  year      = {1999},
  pages     = {48-54},
  ee        = {http://doi.ieeecomputersociety.org/10.1109/ICVD.1999.745123},
  crossref  = {DBLP:conf/vlsid/1999},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}

@proceedings{DBLP:conf/vlsid/1999,
  title     = {12th International Conference on VLSI Design (VLSI Design
               1999), 10-13 January 1999, Goa, India},
  booktitle = {VLSI Design},
  publisher = {IEEE Computer Society},
  year      = {1999},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}